Spills, Fills, and Kills An Architecture for Reducing Register-Memory Traffic

In a typical integer application, 40% of all memory references are generated by the compiler to: save and restore register values at procedure boundaries, pass parameters, and handle register allocation failures. We remove these compiler memory references by augmenting a conventional architecture with a spill name space and separate spill, fill, and kill instructions to access this space. These instructions facilitate compiler name generation while allowing the hardware to take advantage of two key properties of compiler references. First, there is great locality in compiler references and a 128-entry spill store is able to capture over 99% of all spills and fills. Second, spills and fills use a simple addressing mode that permits addresses to be resolved in the decode stage of the pipeline, increasing ILP. The combination of a reduction in memory traffic and an ILP increase results in speedups of up to 40%.